[Semi Thesis Review for me] Meltdown: reading Kernel Memory from User Space -(2)

[3. A Toy Example]

Image from this thesis paper.
  • We can leverage a microarchitectural side-channel attack such as Flush+Reload, Prime+Probes, Evict+Reload, Flush+Flush. → Flush+Reload is the most accurate known cache side channel and is simple to implement, they do not consider any other side channel for this example.
Image from this thesis paper.

→ → Even instructions which are never actually executed, change the microarchitectural state of the CPU.

→ → not to read a value but to leak an inaccessible secret.

[4. Building Blocks of the Attack]

Image from this thesis paper.

[4.1 Executing Transient Instructions]

Transient instructions introduce an exploitable side channel if their operation depends on a secret value.

  • attacker targets a secret at a user-inaccessible address.
  • Accessing user-inaccessible pages(Kernel pages) triggers an exception.

prevent exception: 1. exception handling, 2. exception supppression.

1. Exception handling:

  • The CPU executes the transient instruction sequence in the child process before crashing. The parent process can then recover the secret by observing the microarchitectural state, e.g., through a side-channel.
  • Or, install a signal handler that is executed when a certain exception occurs, e.g., a segmentation fault.

2. Exception suppression:

[4.2 Building a Covert Channel]

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DGIST, undergraduate student, searchien@dgist.ac.kr

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Yu-gyoung

Yu-gyoung

DGIST, undergraduate student, searchien@dgist.ac.kr

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